Notes on working with Xilinx and Altera FPGAs on Linux. I currently have the following setup, but most of this information applies more generally.
Requires a free license that you can get from the Xilinx website after registration. It is quite a download at 4 GB, and it was a good idea to fetch and install it in advance, as I was waiting for my board to arrive.
I installed it as a user on a separate partition, and the only environmental setting I needed was this in my .bash_profile:
PATH=$PATH:/space/Xilinx/13.1/ISE_DS/ISE/bin/lin64The full GUI development environment is called 'ise', but you can use the individual commandline tools as well, see below.
I chose the Nexys2 as my first FPGA board, as it was known to work with Linux via USB without any extra cables. This was made possible with a custom script, whose up-to-date version can be found here:
$ svn co https://ixo-jtag.svn.sourceforge.net/svnroot/ixo-jtag/nexys2prog/trunkNexys2prog can be used to transfer the .bit file to the FPGA, once it has been built with the Xilinx ISE. The script requires tools called fxload and urjtag; on Gentoo the latter needs USE=ftdi.
However, there is also a build script for doing everything in the command line, once you have your source files ready: Verilog / VHDL code and a UCF file for I/O routing. I much prefer this way so I can work in emacs, for example. Below is my extended version with optimizations and other improvements.
A particular benefit of Nexys2prog over vendor tools is platform independence: I have succesfully used it on an ARM server and a PowerPC laptop. The .svf must be generated with the vendor tools, but later you are free to run the FPGA with pretty much any computer. There are similar Free tools for Altera systems.
Nexys2prog does need a working PATH to the Xilinx ISE, though. It need not run any Xilinx programs if the SVF exists, but the BSDL files are needed anyway. In my case, it is installed in a network drive, so it is easily available to other machines. It should be possible to provide the BSDL files in other ways, but then you need to alter the script to avoid the PATH checks.
Having used Nexys2prog for a while, I have since learned about Digilent's own commandline tools for Linux. I started to look into this as I got interested in other Digilent boards, and the programming utility works fine on Nexys2, so I might as well keep using it. Michael Kohn has a nice summary of using this under Gentoo.
While this needs to be installed as root to get the udev magic working, I installed it under /opt/digilent/adept to keep things a little cleaner.
I got a Terasic DE2-115 board on 2011-07-13. Again, I had already downloaded and installed the Altera software, and synthesized some projects in advance.
My first impressions are a lot nicer than with Xilinx: you can download the Web Edition without a full registration, they only want an email address. It can be installed as a user, and the support for different chip families is optional; even high-end series seem to be available in the free-beer edition, which is much better than the tiered model of Xilinx. The synthesis software runs fine without any license hassle.
There seems to be less documentation on command-line usage compared to Xilinx tools, but these are some ways that I found working:
quartus_sh --flow compile $PROJECT quartus_pgm -c USB-Blaster -m JTAG -o "P;$SOF_FILE"One big difference to Xilinx is that the .qsf defines not only pin assignments, but a lot of other project data, for example the target device. Source files are also defined there, so they need not be `included. For my projects, I simply grabbed a .qsf from another project and edited it accordingly. If you want to generate them from scratch, the Quartus II GUI may be the only option.
Also beware that the synthesis programs rewrite the .qsf, which is slightly annoying if it is open in your editor. So far, I have not seen any actual changes in the file, and I have simply saved the one from the editor.
Quartus II for Linux, Web Edition v11.x and 12.x, are 32-bit only. This may cause some issues as most of us now use x86-64 machines. The programs themselves run fine, but linking them with your custom software can be tricky.
While technically 32-bit binaries are an inefficient use of x86-64 CPUs, there can be benefits from the reduced memory footprint. This was another positive surprise after my swap-gobbling Xilinx experiences, until one design hit the 4 GiB limit. Fortunately, older versions are still available, and 10.1sp1 seems to work fine at 64 bits.
13.0 has regained the 64-bit option. It still defaults to 32-bit operation, and you need the --64bit switch to use your modern CPU.
[2012-05-16] Recent Altera downloads have had incorrect URLs, presumably pointing to their own intranet. You need
http://sw-depot/SJ/acds_releases/acdsin the beginning.
Having used Nexys2prog on a Xilinx system, I have learned about UrJTAG which is what actually does the programming. With the Altera USB Blaster, using UrJTAG is actually much simpler than with Nexys2. Here is a working script for the DE2-115 with some further explanations. Basically, you need the chip-specific BSDL file from the Altera site, and the output file must again be in .svf format. Below is a more general version that uses the (faster) Quartus application when on x86.
Some of these scripts include path definitions for Altera/Xilinx software or BSDL files, change these to suit your system before running.